Vital IC

Impedance Boosting with Additional Amplifier

Impedance Boosting Technique I

Architecture

  • Truncation error shaping using the NS-SAR ADC

  • 1st-order DT DSM with CDS integrator and 2nd-order NS SAR quantizer

Performance - SNDR, IRN

  • SNDR(Signal to Noise/Distortion Ratio) : 94.5dB at 500Hz BW

  • IRN(Input Referred Noise) : 0.174 µV/√Hz

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